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AI Chip Market eBriefing
AI Chip Market Assessment
Producers, quality, prices, production volumes, generations and country use
Introduction
The AI chip market is not a normal semiconductor market. It is a strategic infrastructure market dominated by a small number of advanced accelerator suppliers, constrained by leading-edge foundry capacity, high-bandwidth memory, advanced packaging and export controls. The key product is no longer the individual chip alone, but the full AI compute platform: accelerator, memory, interconnect, server, networking, software stack and cloud availability.
At global level, the market is still led by NVIDIA, followed by AMD, hyperscaler-specific custom chips from Google, Amazon, Microsoft, Meta and Broadcom-linked ASIC programmes, and China’s domestic alternatives led by Huawei Ascend. Europe, India and Russia are mainly users and infrastructure buyers, not leading producers of frontier AI accelerators.
1. Main producers and supply chain structure
NVIDIA: the dominant supplier
NVIDIA remains the central actor in AI accelerators. Its dominance is based on four factors: high-performance GPUs, CUDA software ecosystem, NVLink/NVSwitch networking, and preferential access to TSMC advanced manufacturing and packaging.
The main NVIDIA generations currently used are:
Table 1. NVIDIA AI accelerator generations
| Generation | Main chips / systems | Main role |
|---|---|---|
| Ampere | NVIDIA A100 | Older but still widely used for training and inference. |
| Hopper | NVIDIA H100, H200 | Main installed base for frontier AI training and high-end inference. |
| Blackwell | NVIDIA B200, GB200, GB300 | New generation for large-scale training, inference and AI factory deployments. |
| Rubin / Vera Rubin | Expected next NVIDIA generation | Post-Blackwell roadmap for late-decade deployments. |
NVIDIA’s H100 became the reference accelerator for large language model training. The H200 improves memory capacity and bandwidth, which is important for inference and memory-intensive workloads. The B200/GB200 Blackwell generation is designed for much larger AI systems, lower-precision inference and high-density AI factories. NVIDIA’s own DGX B200 system uses eight Blackwell GPUs with 1,440 GB of total GPU memory and 64 TB/s HBM3e bandwidth, while the GB200 NVL72 system reaches 13.4 TB of HBM3e memory and 576 TB/s GPU memory bandwidth at rack scale.
Quality assessment: NVIDIA remains the highest-quality option for frontier AI because performance, software maturity, ecosystem support and interconnect are integrated. For training the largest models, the advantage is not only raw FLOPS but cluster reliability, software tooling, developer familiarity and availability through hyperscalers.
AMD: the main open competitor
AMD is the only Western supplier with a credible GPU alternative at scale. The relevant products are the Instinct MI300X, MI325X and MI350 series.
The MI300X offers 192 GB HBM3 memory and more than 5 TB/s memory bandwidth. The MI325X increases capacity to 256 GB HBM3E and around 6 TB/s on-package peak throughput.
Quality assessment: AMD is increasingly competitive for inference and memory-heavy workloads, especially where large memory capacity is more valuable than NVIDIA’s software advantage. Its weakness remains software maturity: ROCm has improved, but CUDA is still much more established. AMD is attractive for cloud providers and enterprises seeking lower cost, supply diversification and reduced dependence on NVIDIA.
Price assessment: market estimates often place AMD MI300X around $10,000–15,000, compared with H100 often cited around $25,000–40,000 depending on configuration, supply and buyer. These are not official list prices and vary strongly by contract, volume and server integration.
Google TPU: strong but mostly captive
Google’s Tensor Processing Units are among the most important AI accelerators globally, but they are not sold as open merchant chips in the same way as NVIDIA GPUs. They are mostly consumed through Google Cloud and internal Google workloads.
The current relevant generation is TPU v6e / Trillium, Google’s sixth-generation TPU. Google describes Trillium as optimised for transformer, text-to-image and convolutional model training, fine-tuning and serving; TPU v6e pods use a 256-chip footprint.
Quality assessment: TPUs are strong for Google-native workloads, JAX/TensorFlow ecosystems and customers deeply integrated into Google Cloud. They can offer attractive price-performance, but they are less flexible than NVIDIA GPUs for broad heterogeneous AI software stacks.
Amazon Trainium: vertical integration for AWS economics
Amazon’s Trainium and Trainium2 are AWS-designed AI accelerators intended to reduce training and inference costs inside AWS. AWS presents Trainium as a chip designed for “best economics” for high-performance AI training and inference at scale.
Quality assessment: Trainium is strategically important because it gives AWS leverage against NVIDIA pricing and supply constraints. It is best suited for AWS-native customers, especially those willing to optimise around AWS Neuron software. It is less universal than NVIDIA, but increasingly relevant for large inference and training clusters.
Broadcom and custom AI ASICs
Broadcom is a key enabler of custom AI accelerators for hyperscalers. These chips are not always visible to the public because they are designed for specific cloud platforms. The custom ASIC market is growing quickly because Google, Amazon, Meta, Microsoft and other hyperscalers want lower cost per token, lower energy use and less dependence on NVIDIA.
Custom ASIC shipments from cloud providers are projected to grow faster than GPU shipments in 2026, signalling a gradual shift from general-purpose GPUs toward workload-specific accelerators in hyperscale environments.
Quality assessment: custom ASICs can be excellent for specific internal workloads, especially inference at scale. Their weakness is flexibility: they are less attractive for broad developer ecosystems, research workloads and fast-changing architectures.
Huawei Ascend and China’s domestic AI chips
China’s most important AI accelerator family is Huawei Ascend, especially Ascend 910B and 910C. Huawei has positioned Ascend chips as the foundation of its AI computing strategy and has scaled the Atlas 900 A3 SuperPoD around the Ascend 910C.
Production is constrained by U.S. export controls, SMIC manufacturing limitations, yield problems, HBM access and advanced packaging constraints. Reuters reported that Huawei aimed to mass-produce the Ascend 910C in early 2025 despite U.S. restrictions, but also reported yield challenges linked to SMIC production.
Quality assessment: Huawei Ascend chips are the most serious non-U.S. alternative inside China, but they remain behind NVIDIA in software ecosystem, power efficiency, memory supply and large-scale training maturity. They are politically and strategically important because Chinese public cloud, state-funded data centres and government-backed AI projects are being pushed toward domestic hardware.
2. Manufacturing: who actually makes the chips?
The AI chip market is heavily dependent on Taiwan, South Korea, Japan, the United States and the Netherlands at different stages of the supply chain.
Table 2. AI chip supply-chain structure
| Supply-chain layer | Main actors | Strategic importance |
|---|---|---|
| Chip design | NVIDIA, AMD, Google, Amazon, Broadcom, Huawei | Determines accelerator architecture, software ecosystem and platform lock-in. |
| Advanced foundry | TSMC, Samsung, Intel Foundry, SMIC for China | Determines access to leading-edge manufacturing capacity. |
| Advanced packaging | TSMC CoWoS, ASE, Amkor, Samsung | Major bottleneck for high-end AI accelerators integrating GPUs or ASICs with HBM. |
| HBM memory | SK hynix, Samsung, Micron | Essential for high-end GPUs and AI ASICs; capacity and bandwidth directly affect AI performance. |
| Lithography and equipment | ASML, Applied Materials, Lam Research, Tokyo Electron | Critical upstream dependency for advanced semiconductor manufacturing. |
| AI servers | Foxconn, Quanta, Wistron, Supermicro, Dell, HPE, Lenovo | Converts accelerators into deployable AI systems, racks and data-centre infrastructure. |
The key bottleneck is TSMC CoWoS advanced packaging, which integrates GPUs or ASICs with high-bandwidth memory. TSMC’s CoWoS technology remains central for the largest AI processors, and recent industry reporting indicates that CoWoS capacity is a strategic constraint through 2026. TSMC documentation describes CoWoS variants for large interposers and high-integration packages.
In practical terms, even if NVIDIA, AMD or a hyperscaler designs a chip, production depends on TSMC wafer capacity, HBM supply and packaging slots.
3. Prices and economics
There is no single transparent market price because hyperscalers buy systems, racks and multi-year capacity, not loose chips. Still, market estimates are useful.
Table 3. Indicative AI accelerator prices and access models
| Product | Approximate market price / access model | Comment |
|---|---|---|
| NVIDIA A100 | Often below H100, still expensive in secondary and cloud markets. | Older generation but still widely deployed. |
| NVIDIA H100 | Often cited around USD 25,000-40,000 per GPU, depending on configuration and buyer. | Benchmark accelerator for current large-scale AI workloads. |
| NVIDIA H200 | Generally higher than H100 depending on configuration. | Improved memory capacity and bandwidth, useful for inference and memory-heavy workloads. |
| NVIDIA B200 / GB200 | Usually sold as full servers, rack-scale systems or cloud capacity rather than loose chips. | Premium Blackwell generation for frontier AI infrastructure. |
| AMD MI300X | Often estimated around USD 10,000-15,000 per accelerator. | Lower-cost alternative to NVIDIA for selected training and inference workloads. |
| AMD MI325X / MI350 | Early-generation pricing depends on supply contracts and system integration. | Newer AMD high-end accelerator generations. |
| Google TPU | Cloud access model through Google Cloud and internal Google use. | Price-performance depends on workload and Google Cloud integration. |
| AWS Trainium | Cloud access model through AWS. | Designed to improve AWS training and inference economics. |
| Huawei Ascend 910B / 910C | Opaque domestic and negotiated procurement pricing. | Strategically important in China because of export controls and domestic-substitution policy. |
The price of AI compute is increasingly driven by full-system costs: HBM, networking, power systems, liquid cooling, server integration and data-centre availability. Reports indicate that advanced NVIDIA rack systems can cost several million dollars, with memory becoming a much larger share of total system cost.
4. Production volumes
Exact global production numbers are not public. The most reliable assessment is therefore by order of magnitude.
Table 4. Estimated production and deployment scale
| Producer / product group | Estimated scale | Notes |
|---|---|---|
| NVIDIA data-centre GPUs | Millions of units annually across Hopper and Blackwell generations. | Dominates global merchant AI accelerators. |
| AMD Instinct | Hundreds of thousands to low millions depending on year and capacity. | Growing but still much smaller than NVIDIA. |
| Google TPU | Hundreds of thousands to potentially millions over multi-year cloud deployment. | Mostly internal use and Google Cloud availability. |
| AWS Trainium | Rapidly growing internal AWS fleet. | Exact volumes not public; strategic tool to reduce AWS dependence on NVIDIA. |
| Huawei Ascend | Hundreds of thousands in 2025, potentially higher if yields and HBM access improve. | Constrained by sanctions, domestic manufacturing capacity, advanced packaging and memory supply. |
| Other Chinese AI chips | Smaller but strategically supported. | Includes Alibaba, Baidu, Cambricon, Biren, Moore Threads and other domestic efforts. |
For China, Reuters reported a U.S. official estimate that Huawei could produce no more than 200,000 advanced AI chips in 2025, while also noting that China is working to close the gap. Other estimates are higher, but they are less certain and depend heavily on yield, HBM and packaging assumptions.
5. Which countries use which AI chips?
United States
The U.S. uses the most advanced AI chips and has priority access through hyperscalers and AI labs. Main users include OpenAI, Microsoft, Google, Amazon, Meta, xAI, Anthropic, Oracle and a large ecosystem of cloud and neocloud providers.
Main chips used
- NVIDIA H100, H200, B200, GB200, GB300;
- Google TPU v5/v6 Trillium;
- AWS Trainium / Inferentia;
- AMD MI300X / MI325X / MI350;
- custom ASICs developed with Broadcom and other partners.
The U.S. has the best access to frontier compute because it controls most AI chip design, most hyperscale cloud demand and the largest AI capital expenditure cycle.
China
China uses a mixture of restricted NVIDIA chips, downgraded export-compliant NVIDIA chips, domestic Huawei Ascend chips and other Chinese accelerators.
Main chips used
- Huawei Ascend 910B / 910C;
- NVIDIA A100/H100 through legacy systems or grey-market channels;
- NVIDIA H20 or other China-compliant variants when permitted;
- Alibaba, Baidu, Cambricon and other domestic accelerators.
China’s strategy is substitution under pressure: use NVIDIA where available, but push public and strategic systems toward domestic chips. U.S. export controls have made China’s market structurally different from the rest of the world.
Europe
Europe is mostly a buyer and user, not a producer of frontier AI accelerators. European AI infrastructure depends heavily on NVIDIA GPUs, cloud hyperscalers and emerging EuroHPC / AI Factory procurement.
Main chips used
- NVIDIA A100, H100, H200, B200/GB200 in cloud and research;
- AMD MI300/MI325 in some HPC and cloud deployments;
- Google TPU and AWS Trainium through cloud services;
- smaller European semiconductor efforts mainly in edge AI, automotive, neuromorphic and embedded processors.
Europe’s weakness is not research quality but scale: it lacks a merchant frontier AI accelerator comparable to NVIDIA, and it depends on U.S. platforms and Taiwanese manufacturing. European initiatives such as AI Factories and AI Gigafactories aim to reduce the compute gap, but they do not yet solve the absence of a European frontier GPU.
India
India is an expanding AI compute buyer. Its IndiaAI Mission and cloud procurement efforts are focused on building domestic compute capacity, but India does not yet produce frontier AI accelerators.
Main chips used
- NVIDIA H100/H200/B200 through public-private compute tenders and cloud providers;
- AMD GPUs in some cloud and enterprise contexts;
- cloud-based access to Google TPU and AWS Trainium;
- future domestic AI chip efforts are possible but not yet at frontier scale.
India is strategically important because it is a fast-growing AI demand market. It is likely to become a major compute consumer, not a leading chip producer in the short term.
Russia
Russia is severely constrained by sanctions and export controls. It has limited access to frontier AI chips and relies on imports through third countries, older NVIDIA GPUs, domestic lower-end chips and Chinese technology where available.
Main chips used
- older NVIDIA GPUs where obtainable;
- Chinese accelerators in some cases;
- domestic processors for limited workloads;
- cloud access through non-Western channels where possible.
Russia is not a major producer of frontier AI accelerators and is unlikely to compete technologically with the U.S., China or leading hyperscalers in the near term.
6. Generations currently in use
Table 5. AI chip generations and country use
| Generation / platform | Typical deployment status in 2026 | Main users / countries |
|---|---|---|
| NVIDIA A100 | Still widely used, especially for inference and older training clusters. | Global use, including Europe and emerging markets. |
| NVIDIA H100 | Core installed base for frontier AI training and high-end inference. | United States, Europe, Gulf states, India, Japan, Korea and major cloud markets. |
| NVIDIA H200 | Increasingly used for memory-heavy inference and training. | United States, Europe and advanced cloud markets. |
| NVIDIA B200 / GB200 | New frontier generation for AI factories and very large AI clusters. | U.S. hyperscalers first, followed by selected global customers. |
| AMD MI300X / MI325X | Alternative GPU platform for diversification and price-performance competition. | U.S. cloud providers, selected global providers and enterprise/HPC deployments. |
| AMD MI350 | Emerging next AMD generation. | Early large cloud and enterprise deployments. |
| Google TPU v5 / v6 Trillium | Google internal and Google Cloud platform. | United States and Google Cloud regions globally. |
| AWS Trainium2 | AWS internal and AWS customer platform. | United States and AWS global cloud regions. |
| Huawei Ascend 910B / 910C | Domestic AI infrastructure under export-control constraints. | China and selected partner ecosystems. |
| Edge AI chips | Device, automotive, robotics and industrial-edge workloads. | Qualcomm, Apple, Intel, NVIDIA Jetson and European embedded/automotive ecosystems. |
7. Strategic assessment
The global AI chip market is divided into three layers.
First, frontier AI compute, dominated by NVIDIA and U.S. hyperscalers. This is where the most advanced model training and large-scale inference happen. Europe, India and most other countries are buyers, not producers.
Second, custom hyperscaler silicon, led by Google TPUs, AWS Trainium and Broadcom-linked ASICs. This layer is growing because hyperscalers want to lower cost per token and avoid total dependence on NVIDIA.
Third, sovereign and constrained-market chips, led by Huawei Ascend in China. These chips are strategically important even when technically weaker, because export controls make domestic alternatives necessary.
The market’s key constraints are no longer only semiconductor design.
They are:
- TSMC advanced-node and CoWoS packaging capacity;
- HBM supply from SK hynix, Samsung and Micron;
- power and cooling for AI data centres;
- networking and interconnect;
- software ecosystems;
- export controls and geopolitical allocation;
- capital expenditure by hyperscalers and governments.
For Europe, the conclusion is clear: Europe can regulate AI, finance AI adoption and build AI factories, but it remains structurally dependent on non-European AI chips and cloud platforms. Without a European frontier accelerator ecosystem, Europe’s AI sovereignty will remain partial: stronger in regulation, research and industrial applications, weaker in compute, foundation-model infrastructure and semiconductor scale.
Sources Used for the eBriefing on the AI Chip Market
Official company and product sources
- NVIDIA — DGX B200 System
Source used for information on NVIDIA Blackwell GPUs, DGX B200 architecture, GPU memory, HBM3e bandwidth, NVLink and system-level AI factory infrastructure.
https://www.nvidia.com/en-us/data-center/dgx-b200/ - NVIDIA — HGX Platform
Source used for information on NVIDIA’s data-centre AI platform, GPU interconnect, memory bandwidth and high-density AI compute systems.
https://www.nvidia.com/en-us/data-center/hgx/ - AMD — Instinct MI325X Accelerator
Source used for information on AMD Instinct AI accelerators, HBM memory capacity, memory bandwidth and AMD’s positioning as an alternative to NVIDIA GPUs.
https://www.amd.com/en/products/accelerators/instinct/mi300/mi325x.html - Google Cloud — TPU v6e / Trillium
Source used for information on Google’s sixth-generation TPU architecture, TPU pod size, peak compute, HBM capacity and Google Cloud AI accelerator infrastructure.
https://cloud.google.com/tpu/docs/v6e - Amazon Web Services — AWS Trainium
Source used for information on AWS Trainium, Trainium2, AWS AI accelerator strategy, EC2 Trn instances and Trainium’s positioning for AI training and inference workloads.
https://aws.amazon.com/ai/machine-learning/trainium/ - Huawei — Ascend AI Computing Ecosystem
Source used for information on Huawei Ascend chips, China’s domestic AI accelerator strategy and Huawei’s role in China’s AI compute infrastructure.
https://www.huawei.com/en/news/2025/9/hc-xu-keynote-speech
Semiconductor manufacturing, packaging and memory sources
- TSMC — CoWoS Advanced Packaging
Source used for information on CoWoS, silicon interposers, chiplet integration, HBM integration and the role of advanced packaging in AI accelerators.
https://3dfabric.tsmc.com/english/dedicatedFoundry/technology/cowos.htm - SK hynix — HBM3E High-Bandwidth Memory
Source used for information on HBM memory for AI chips, SK hynix’s role as a leading HBM supplier and the strategic importance of HBM in AI semiconductor supply chains.
https://news.skhynix.com/sk-hynix-develops-worlds-best-performing-hbm3e/ - TSMC Packaging Industry Reporting
Supporting background on CoWoS capacity, packaging bottlenecks and why advanced packaging remains critical for large AI processors.
https://www.tomshardware.com/tech-industry/semiconductors/tsmc-says-panel-packaging-wont-replace-cowos-anytime-soon-for-the-largest-future-ai-processors-wafer-level-tech-can-scale-to-58-massive-dies-in-one-package
Market, production and geopolitical sources
- Reuters — Huawei Ascend 910C Production
Source used for information on Huawei’s planned mass production of the Ascend 910C, the effect of U.S. export controls and SMIC-related production constraints.
https://www.reuters.com/technology/artificial-intelligence/huawei-aims-mass-produce-newest-ai-chip-early-2025-despite-us-curbs-2024-11-21/ - Reuters — Huawei Advanced AI Chip Shipments
Source used for later market information on Huawei’s planned advanced AI chip shipments and demand from Chinese technology companies.
https://www.reuters.com/world/china/huaweis-new-ai-chip-find-favour-with-bytedance-alibaba-which-plan-place-orders-2026-03-27/ - Reuters — Huawei AI Chip Production Limits
Source used for estimates and geopolitical context concerning Huawei’s production capacity under export-control constraints.
https://www.reuters.com/world/china/us-says-chinas-huawei-cant-make-more-than-200000-ai-chips-2025-2025-06-12/ - Semafor — NVIDIA H200 and China Export-Control Context
Source used for information on U.S. policy regarding NVIDIA H200 sales to China and the strategic role of export controls in the AI chip market.
https://www.semafor.com/article/12/09/2025/trump-says-nvidia-can-sell-h200-ai-chips-to-china - Jarvis Labs — NVIDIA H100 Market Pricing
Source used for indicative market pricing of NVIDIA H100 GPUs and cloud-rental price ranges. These figures are market estimates and should not be treated as official list prices.
https://jarvislabs.ai/blog/h100-price - Silicon Analysts — AI GPU Pricing and Supply Chain
Supporting market commentary on NVIDIA GPU pricing, B200 constraints, second-hand H100 prices and broader AI accelerator supply-chain pressure.
https://siliconanalysts.com/analysis/nvidia-gpu-prices-double-as-ai-demand-overwhelms-supply-chain - Reuters — SK hynix and HBM Leadership
Source used for the assessment of HBM as a strategic bottleneck and SK hynix’s position in the AI memory market.
https://www.reuters.com/world/asia-pacific/sk-hynix-overtakes-samsung-become-koreas-most-valuable-company-2026-06-22/
Technical and academic background sources
- Academic Performance Analysis of AMD MI300X
Supporting technical background on AMD MI300X performance, HBM capacity and its role as a credible alternative for LLM inference and AI workloads.
https://arxiv.org/abs/2510.27583 - AWS Trainium Technical Research
Supporting evidence on Trainium’s use for LLM training and inference, including strengths and software challenges of AWS’s accelerator ecosystem.
https://arxiv.org/abs/2510.25977 - AWS Trainium and Inferentia RAG Implementation
Technical background on practical AI workloads deployed on AWS Trainium and Inferentia accelerators.
https://arxiv.org/abs/2407.12057
Source Note
This eBriefing uses a combination of official company technical documentation, semiconductor supply-chain sources, market reporting, Reuters geopolitical coverage and technical research papers. Product specifications are based primarily on official vendor sources. Price, production-volume and market-share figures are indicative estimates based on public market reporting and should be treated as approximate rather than definitive.
Legal Notice - Addendum
This eBriefing reflects information available up to 20 June 2026. The global market for AI chips, accelerators, high-bandwidth memory, advanced packaging, AI servers and data-centre infrastructure is evolving rapidly. Market positions, production volumes, prices, export restrictions, procurement strategies and technology generations may change quickly due to new product releases, supply-chain constraints, geopolitical measures, industrial-policy decisions and hyperscaler investment cycles.
Particular attention should be paid to developments concerning NVIDIA, AMD, Huawei, Google TPUs, AWS Trainium, custom AI ASICs, TSMC advanced-node manufacturing, CoWoS and other advanced packaging capacity, high-bandwidth memory supply, export-control regimes, cloud-provider procurement strategies, sovereign AI infrastructure programmes and national semiconductor policies.
Price indications, production estimates and market-share assessments included in this eBriefing should be understood as indicative and analytical estimates, based on publicly available information and market reporting. They do not constitute investment advice, procurement advice, financial advice or a guarantee of current market prices, availability or future performance.
The web version of this eBriefing follows the structure and visual identity of the PDF eBriefing and is designed for publication on eEuropa.org or integration into a web page.
Copyright notice: © eEuropa.org / eEuropa Belgium, 2019-2026. All rights reserved. EU institutional source material remains subject to the applicable European Union reuse rules.
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